2.5 D Interposer

Silicon and glass interposers offer new possibilities to merge advanced devices e.g. high pin count ASICs, memories and MEMS to form 3D SiPs. Depending on the product requirements they can be realized fully customer-specific with a high degree of flexibility in lateral size, TSV/TGV geometry and density as well as number of routing layers and nature of IO terminal pads for component and second level assembly.

Silicon Interposers with vertical through contacts act as component carriers or adapters between integrated circuits with highest IO densities and organic carrier. They are created with established TSV middle or TSV last processes. Current TSV generations also include integrated active devices and will be optimized for high power dissipation and high speed data transmission. Glass interposer especially bear advantages in specific silicon/glass packages and also in large area substrate applications.

• Interposers with high-density Cu-TSVs
• High-density multi-layer copper wiring: > 2 μm line/space, 4-layer frontside RDL, up to 3-layer backside RDL
• Integration of passive devices (R, L, C)
• Embedding of active and passive devices
• Interconnects for 3D stacking of devices/substrates
• Thermal management

• Customer specific design and prototyping
  
• Fabrication of high density silicon interposer with TSV and multi-layer redistribution
• Typical interposer features:
  • TSV diameter: 10-20 μm
  • TSV depth: > 100 μm