Substrate Finish and Reliability
The interconnect behavior of any surface finish depends on layer built up, surface cleanliness, process bath chemistry, chemical and thermal stability, surface profile, pad design ….
Typically quality defects are not visible before joining PCB’s with the components, sometimes they are not detectable after the joining process too.
Otherwise the complexity of board interconnection technologies in todays applications (reflow and wave soldering, glueing, wire bonding) causes much more stress for the surface finish than a few years ago, furthermore the maximum temperature load of lead free soldering is 20 K higher.
So the challenge is to find out failure root causes, to develop and investigate process technologies and to improve the process reliability.
For this reason we have a lot of different analytical and preparation methods for surface-, system- and material analysis available. There are REM/ EDX, FIB, ESCA, AFM, electrochemical methods like coulometry or CVS. Our stuff is specialized in investigations of electronic assemblies over more than ten years.
We have experiences with surface finishes like ENIG, immersion tin and immersion silver and we did studies about wetting behavior, intermetallic growth and especially about root cause and failure mechanism for the formation of ‘black pads’.