Thanks to the support it has received from the Federal Ministry of Education and Research and the Free State of Saxony, a research and development pilot line for wafer level packaging and 3D integration (8”/12”) was implemented in Dresden in 2010, and ever since then it has benefited from ongoing further development.

Through its global collaboration with system users and plant and material manufacturers, IZM-ASSID has become one of the leading providers in the field of heterogeneous wafer level system integration, the scope of which extends from the development phase through to qualified low volume manufacturing.

We will also continue along this route as part of  Fraunhofer IZM in future in order to develop and implement outstandingly successful scientific and technical solutions for the challenges of a digitalized society in the spheres of IoT, AI and HPC.

IZM-ASSID would like to thank all its partners in industry, science and politics for the confidence they have shown and for the successful collaboration. We are looking forward to overcoming the challenges of the future together.

The modular approach of the systems is needed wherever small, energy-efficient and highly functional electronics are important. The focus is on technologies and materials for systems that combine several electronic components in miniaturized form, i.e. medical devices or applications in safety and automation technology and the automotive industry. To make the systems even more powerful, the components are no longer connected in one layer but stacked and connected in several layers. This results in wafer level system-in-packages or in short: WL-SiP.

more info

 

In 2015, Fraunhofer IZM-ASSID took an important milestone for qualified customer-specific process development. In April, the International Certification Group (ICG) certified the "All Silicon System Integration Dresden - ASSID" center of Fraunhofer IZM as having a management system in accordance with the DIN EN ISO 9001:2008 standard and certified it for the scope "Research, development and services in the field of electronic packaging".

At Fraunhofer IZM-ASSID, state-of-the-art wafer-level packaging and system integration technologies for 3D integration using silicon through-plated vias (TSVs) are developed and implemented in a prototyping process. Fraunhofer IZM-ASSID works closely with equipment and material manufacturers in this field.

The center has an industry-compatible 300mm pilot line for TSV formation and 3D wafer-level system-in-packages.